Voltage translator circuits, and particularly CMOS voltage translator circuits, that have the ability to translate a digital input signal that switches between a first set of voltages (such as ground and three volts) to a digital output signal that switches between a second set of voltages (such as a voltage below ground and a voltage greater than three volts) are well known in the art. One typical application for translator circuits is to switch digital signals between logic families such as CMOS to TTL or ECL, or between any other logic families or circuits having voltage-incompatible logic levels. However, translator circuits are also used in many different functional blocks and applications, and then usually implemented in integrated circuits. In many applications the switching speed of the translator circuit is critical in achieving the overall performance goals for the corresponding functional block or integrated circuit. Most existing designs are not able to achieve these performance goals if very high speed operation is desired.
(Propagation delays on the order of two nanoseconds or less are required). More elaborate designs or processes other than CMOS processes may be used to achieve high speed performance goals, but due to circuit complexity or process characteristics they can add unnecessary power dissipation, increased precious integrated circuit die area, and/or additional expense to the finished integrated circuit.
What is desired, therefore, is a high speed translator circuit that is able to achieve high switching speeds and low propagation delays, but is realized with a design that can be economically implemented in an integrated circuit.